1. Field of the Invention
The present invention relates to a method and computing system of allocating registers, and more particularly, to a method and a computing system of allocating registers to reduce the energy consumption.
2. Description of the Prior Art
With the development of the technology, the increasing demand for computing power of hardware has led to the large energy consumption. For example, the more hardware threads graphics processing unit (GPU) supports, the more performance and power consumptions we obtain. Different register organization methods of hardware are proposed to reduce the power consumption of the hardware. For example, a hierarchical register file organization and an affine register file organization of GPU can be used in the design of processor.
Moreover, modern GPUs are designed as single instruction multiple data (SIMD) execution model that groups the parallel threads to execute the same instruction in the lock-step. In order to rapidly switch to different tasks, each thread has its own register to store the context. However, the large number of threads and registers has also led to the high energy consumption problem of GPU.
Therefore, how to reduce the power consumption of allocating large amount of registers has become a crucial issue.